The prior art separates between digital data processor technology optimized for non-real time execution, sometimes known as applications processors, including memory management units (MMUs) and caches, and optimized for real time and hard real time execution, for example microcontroller units (MCUs) and digital signal processors (DSPs).
Existing microprocessor and microcontroller systems are focused on either applications processing or real time processing. Applications processing uses mechanisms to improve average performance while accepting poor worse case performance. Applications processing tends to use a virtualized memory system to hide physical details and to protect the system from application errors. Real time processing focuses on deterministic/predictable behavior, while sacrificing maximum code and data performance. Real time processing is typically speed limited by the slowest component of the system, such as on-chip Flash memory.
Some terms used in this application are defined as follows:
External memory interface is one or more memory bus slaves that allow access to slower memory, such as external memory (off chip or off die). This external memory may be any form of memory that is slower than the optimal memory in the system. This external memory is the memory that the non-real time code executes from and accesses. This external memory is typically used for both code and data memory. There is no assumption that the non-real time code cannot also access faster memory.
Interrupt is an exception to code flow caused by a request or signal on a wire, by a software exception, by a software request or trigger or other generally external means. Interrupt does not include normal code flow such as calls and branches.
Interrupt controller is the portion of a processor system which manages interrupts and exceptions. An interrupt controller may be integrated with the processor system or it may not be.
Processor or processor core refers to the execution engine of a processor system, such as an MCU, micro-processor or equivalent.
Code refers to instructions executed by a processor.
Execution means reading and processing of instructions, such as branches, load and store of memory and data processing such as addition, subtraction, multiplication and the like.
Cache refers to a fast memory area with a lookup/index based on address storing certain contents of slower and larger memory. The processor executes faster when reading from a cache or writing to the cache because it does not stall waiting for the slower memory. L1 cache is bound to the processor's ports and often includes separate instruction storage and data storage. L2 cache is a system level cache. L3 cache sits in front of external memory. This application uses L3 loosely as the barrier between real time and non-real time memory.
Memory management unit (MMU) provides virtual to physical mapping of addresses. An MMU uses a page table in memory provided by the application to map virtual addresses into actual physical locations.